The Mapping and Optimization Method of Quantum Circuits for Clifford + T Gate

In order to solve the fault tolerance and reliability problems of quantum circuit, a series of structural equivalence rules and optimization operation strat-egies of quantum circuit are proposed to minimize the number of T gates, increase T gate depth, minimize circuit level, reduce fault tolerance implementation costs and increase circuit reliability. In order to satisfy the nearest neighbor constraints of some quantum systems, a LNN (linear nearest neighbor) arrangement algorithm based on Clifford + T gate quantum circuit is presented. Experiments are done on some benchmarks of RevLib, the results show that the optimization rate of most functions and the running time of the algorithm are better than those of the existing literature.


Introduction
Quantum circuits are an important model of quantum computing. The integration and optimization of quantum circuits is of great significance [1] [2] [3]. In recent years, the Clifford + T gates [4] [5] [6] have been used in some typical quantum circuits. Due to the importance of fault tolerance in quantum computing [7] [8], and the fault-tolerant implementation cost of T gates may exceed the implementation cost of Clifford Gate by 100 times or more [4]. Therefore, minimizing the number of T gates is critical to optimizing the T depth of a quantum circuit.
Due to the limitation of quantum techniques, it is required that the control bit and target bit of the 2-qubit gates are physically adjacent, that is the Linear Nearest Neighbor (LNN) constraint required to be considered [9] [10] [11]. This

Quantum Gate and Quantum Circuit
The basic unit of operation in a quantum system is a qubit, which is similar to a bit in classical computer system. Qubits can represent states 0 and 1, represented by the symbols |0> and |1> respectively. Qubits can also represent an infinite number of state vectors |φ> (called quantum superposition states) between 0 and 1, expressed as: where α and β are complex numbers and satisfy the condition The operation of the qubit is equivalent to superimposing a unitary matrix U on the state vector of the qubit. The logic gates that operate on qubits in quantum circuits are called quantum gates [12], and each quantum gate can be represented by a 2 n -order unitary matrix, where n represents the number of qubits.
A quantum circuit cascaded by quantum gates is called a quantum circuit. Some specific quantum gates that make up a quantum circuit are called quantum gate libraries [13]. The NCV gate library contains quantum gates such as NOT, CNOT, V, and V + [9]. The Clifford + T gate library includes quantum gates such as NOT, CNOT, H, S, S + , T, and T + which is shown in Table 1. The circuit cascaded only by Clifford + T quantum gates is called Clifford + T circuit. The Clifford + T gate libraries are adopted by many quantum physics architectures [14].
The one-dimensional n-qubit circuit has n horizontal lines, respectively representing n quantum bit lines, which are sequentially recorded as 1 2 { , , , } n l l l l = … from top to bottom. The position of the left to right quantum gate in the line (can be regarded as a vertical line from left to right) indicates the time sequence of the line execution, which is recorded as Figure 1 is an example of representation of quantum circuit. There {1, 2,3, 4} l = and {1, 2,3, , 21} h = … .

Quantum Gate Decomposition
In general, quantum algorithms can be described by reversible circuits of MCT reversible logic gate cascades of multiple (single) control bit(s)/multiple (single) target bit(s). In order to map a reversible circuit to a quantum system for computation, it is necessary to decompose the logic gates in the reversible circuit. It can be seen from the literature [15] and [16] that a two control bits Toffoli gate is decomposed into a circuit composed of NCV gate library quantum gates as shown in Figure 2. AV gate can be decomposed into seven gates as shown in Journal of Applied Mathematics and Physics   Figure 3(a). A V + gate can be decomposed into seven gates as shown in Figure   3(b), and the equivalent circuit can be obtained by further simplification as shown in Figure 3(c).

Clifford + T Circuit Structure
Definition 1: In a one-dimensional quantum circuit, a sequence of quantum gates that can be operated in parallel is called a circuit level. If two or more quantum gates can be combined together in a circuit, their qubits can operate in parallel without disjoint, and these quantum gates are said to form a grouped.
Definition 2: In a one-dimensional circuit, the circuit depth is the number of levels in the circuit.
Definition 3: The T-depth of the Clifford + T circuit is the number of T or T + gates contained on different qubit lines in one level of the circuit.
Definition 4: A "CNOT + T(T + ) + CNOT" structure is a gate group by the consisting of two CNOT gates and one T or T + gate, called the CTC-structure.   The two control bits and the two target bits of the two CNOT gates are on the same qubit line, and the T (or T + ) gate is between the two target bits. Definition 5: The depth of the CTC-structure refers to the number of T (or T + ) gates that can be operated in parallel in the CTC-structure.
Definition 6: If the depth of the CTC-structure is equal to the number of the circuit input/output qubits, then this CTC-structure is said to be full.

Decomposition and Optimization of the Quantum Circuits
In order to optimize quantum circuits, the quantum gates and related sub-line structures in the Clifford + T circuit are analyzed and discussed in this section.

Relevant Properties
The following properties 1 -3 [5] can be verified by the matrix representation of the quantum gates, which are multiplied by matrices to obtain the results of their interactions.
Property 1: (a) Two adjacent T-gates are equivalent to a S-gate. Two adjacent T + -gates are equivalent to a S + -gate.  The equivalence of the above subcircuits can be easily verified by the truth table.
Conclusion 1: The combination of two adjacent T-gates and 2-qubit gate are equivalent on the right and the left of control bit of this 2-qubit gate.
The combination of two adjacent T + -gates and 2-qubit gate are equivalent on the right and the left of control bit of 2-qubit gate.
The above inferences are readily available based on property 5.
Generally, the arbitrary combination of m (m ≥ 1) 2-qubit gates and n (n ≥ 1) T-gates (or T + -gates) are equivalent, if the control bits of m (m ≥ 1) 2-qubit gates and n (n ≥ 1) T-gates (or T + -gates) are on the same qubit line.
Conclusion 2: According to property 1, the S-gate (or S + -gate) distributed on the left and right sides of the control bit is equivalent for a combination of an S-gate (or S + -gate) on the control bit line of a two-qubit gate and the two-qubit gate. It can be seen from the conclusion 1.  Proof: As long as proof 1), then 2) is available as the same. 1) According to the Property 6, the CTC-structure interchange control bit line with target bit line is equivalent, so the combination of a T gate and a CTC-structure on the same qubit line is also equivalent. As show in Figure 6 that Figure 6(a) is equivalent to Figure 6(b); 2) According to the Property 5, the T gate of Figure 6(b) can be moved to the right side of the first CNOT gate. Similarly, it can be moved to the right side of the second CNOT gate to get Figure 6(c). As show in Figure 6 that Figure 6(b) is equivalent to Figure 6(c); 3) According to the Property 6, the CTC-structure interchange control bit line with target bit line is equivalent, therefore, the combination of the CTC-structure and the T gate on the same bit line is also equivalent. As show in Figure 6 that Proof: In an 1-dimensional quantum circuit, it is assumed that there are k quantum bit lines l (i.e. the input/output of the quantum line is k), that is, The target bit line of V-gate in V ′ can be decomposed into: ( ) The target bit line of V + -gate in V ′ can be decomposed into: It can be seen that when m, n ≥ 1, continuous m + n V'-gates are decomposed, and m + n − 1 pair of H-gates are adjacent on the target bit line of CTC-structure. In (1) and (2), the first H-gate and the last H-gate are the remaining, and there are m + n CTC-structures and m T-gates and nT + -gates between this two H-gates. By the theorem 1, these mT-gates and nT + -gates can be moved so that they are adjacent. So there have: 1) When m>n, there are n T-gates and nT + -gates are eliminated and ⌊(m − n)/2⌋ pairs of T-gates are replaced by ⌊(m − n)/2⌋ S-gates. If m-n is an even number, all T gates are replaced; if m-n is an odd number, then remain a T-gate. The target bit line of V ′ -gate can eventually be decomposed into:

T H m n is odd
2) When m = n, all T-gates and T + -gates are eliminated. The target bit line of V ′ -gate can eventually be decomposed into: The control bit of V-gate and V + -gate in V ′ can be decomposed into the QED■ As shown in Figure 7(a), the circuit has eight 2-qubit gates (G 1 to G 8 from left to right), where G 1 , G 3 , G 5 , G 8 ) gates whose target bits are Journal of Applied Mathematics and Physics on the same qubit line c l . The circuit after decomposition is shown in Figure  7(b) where the second H gate and c T gate generated by G 1 are eliminated respectively with the first H gate and c T + gate generated by G 3 , the second H gate and c T + gate generated by G 3 are eliminated respectively with the first H gate and c T gate generated by G 5 , while the H gate generated by G 8 cannot cancel out with the H gate generated by G 5 because of the blocking of the G 6 target bit.
The a T generated by G 5 and G 8 respectively can be merged into a S .

Algorithm for Decomposition of NCV Circuit
In order to obtain the quantum circuit composed of Clifford + T gate, using the equivalent circuit given in Figure 3 and the related theory of theorem 2 to decompose NCV circuit. The circuit is initially optimized with the relevant properties in the decomposition process. The decomposition algorithm is shown in Algorithm 1.

Depth Maximization of the CTC-Structure
In order to deepen the depth of the CTC-structure, reduce the depth of the circuit, improve the parallelism of the circuit, the decomposed Clifford + T circuit need to be structured and the main goal is to make the depth of each CTC-structure equal to the number of qubits (That is to say, make the CTC-structure to be fully occupied). The CTC-structure depth deepening algorithm is shown in Algorithm 2. Journal of Applied Mathematics and Physics Algorithm 3. CNOT optimization algorithm.
gates are required to satisfy linear nearest neighbor constraints. In a quantum logic circuit, to exchange the logic values of certain two circuits, it can generally be realized by inserting a SWAP-gate. The SWAP-gate also needs to satisfy the linear nearest neighbor in the nearest neighbor constrained quantum circuit, it is called the nearest neighbor SWAP gate (NNS gate) [7]. An NNS gate is equivalent to three cascades of CNOT gates that satisfy the linear nearest neighbor architecture, as shown in Figure 8(a). Some quantum circuit physical structures require even stronger constraints. For example, IBM QX [17] [18] requires that the CONT gates in different directions be flipped through the H gate to be in the same direction (control bits and target bits are on two qubits), as shown in Figure 8(b). Converting a non-LNN Clifford + T circuit into an LNN Clifford + T circuit is usually done by inserting several NNS gates, as shown in Figure 9. Figure 9(a) is a non-LNN circuit, Figure 9(b) is equivalent LNN circuit by insert SWAP gates, Figure 9(c) is equivalent form of NNS gate.

Synthesis Algorithm
It can be seen from the literature [1] that the linear nearest neighbor cost of the 2-qubit gate G in a quantum circuit is: where C l and T l are the number of the control bit line and the target bit line of G, respectively, the nearest neighbor cost of a Clifford + T circuit is: where N is the number of quantum gates in the Clifford + T circuit and K is the linear nearest neighbor cost calculation coefficient of the circuit.
This paper presents an adaptive Clifford + T circuit neighborhood optimization algorithm, such as Algorithm 4. The optimized Clifford + T circuit is scanned from left to right, and all LNN schemes are listed for the first non-LNN 2-qubit gate is encountered. Calculate the CC′ of the remaining circuit after each scheme is executed, select the scheme with the smallest CC′ , insert the NNS gates into the circuit one after the other, then continue to scan the remaining circuits, and iteratively execute the above steps until all the quantum gates reached LNN. The algorithm is executed for all coefficients K, and the scheme with the least number of inserted switching gates is recorded for output.
The time complexity of the algorithm is ( ) O L N K × × , where L is the quantum number. For small-scale circuits, try all the coefficients K to find the optimal solution. For large-scale circuits, K can be reduced to a constant term in order to reduce algorithm runtime.

Experiment and Result Analysis
According to all the considerations and methods discussed above, based on Rev-Lib [19] benchmark and the decomposition tool designed by the research team [6], use Intel (R) 64 -3.2 GHz bit processor, 8 GB RAM, windows 10 operating environment, C++ programming language. Decompose NCV gate library circuit into basic quantum gate circuit of Clifford + T structure, then through neighboring and CNOT gate flipping the relevant constraints comparable to the literature [14] are satisfied, so use the experimental results to compare with the results in [14] (Table 2). In order to more fully evaluate the effectiveness of the proposed method, the benchmark function selected in this paper is more extensive. Since the literature [14] only targets the 10 -16 qubit part of the benchmark Journal of Applied Mathematics and Physics

Conclusion
Due to the limitations of some quantum techniques, there are special requirements for the use of quantum gates in quantum circuits, and the linear nearest neighbor constraints are required for the physical positions of the control bits and target bits of the 2-qubit gates. The main work of this paper is to map the NCV circuit to the equivalent circuit composed of Clifford + T gate, optimize the quantum gate number and T depth, reduce the circuit depth, propose a series of circuit structure equivalence rules and optimization operation strategies.
The CNOT gate neighbor algorithm of the Clifford + T gate quantum circuit satisfies the CNOT constraint imposed by the architecture. In the related properties and operation methods proposed in this paper, due to the limitation of H gate, the optimization of the circuit will have a great impact. How to lay out the position of the H gate is an important part of future work research.