Implementation & Comparative Analysis of 10, 18 & 24 Level Diode Clamped Inverters Using "Trust Region Dog Leg" Method

Multilevel inverters are used in many industrial applications because of good power quality, minimum losses and less harmonics contents. Multilevel inverters require no series connected synchronized switching devices, transformer and complex filters. In this paper 10, 18, 24 diode clamped multi-level inverters (DCMLI) are implemented using trust region dog leg optimization method to find the optimized values of switching angles (θ). It decreases the total harmonic distortion (THD) of the output voltages and to reduce the complexity of external filter required. The multi-level inverters are implemented in MATLAB Simulation and results are compared in terms of harmonics, system complexity and efficiency.


Introduction
Different techniques like Sinusoidal pulse width modulation (SPWM), SVPWM and multilevel inverters are used for the conversion of DC into AC power [1]. Numerous techniques of multi-level inverters are implemented to improve the power quality and harmonic distortion [2]. 5-level cascaded multi-level inverter implemented for power quality improvement using DSTATCOM with isolated energy for DC storage [3]. A chopper circuit with the flying capacitor voltage diode clamped for alignment of multilevel inverters reduces chopper frequency and voltage to AC voltage multilevel production [4]. 5-level diode clamped inverter for electric ma-chines, working at high speed with the power of twelve [5]. 3-level diode clamped inverter with active neutral points and zero current transition (3 tests such as pre-employment) use it for sustainable energy [6].
Comparison between two diodes clamped inverter nerve point of converter (DNPC-3 l tests such as preemployment) and (ANPC-3 l tests such as pre-employment) discussed options for switching energy volume [7]. Using capacitors and one DC source to build multilevel inverter cascaded (H-bridge) [8].
H-bridge multilevel inverter flying capacitor using two different schemes of voltage balancing and equations used [9]. The closed method based on carrier to minimize losses of switches for a half cycle of the basic wave is used for analyzing each half-cycle of the switch area [10]. Two SVM methods are executed that explosive for the purpose of controlling the DVR in order to reduce the losses in the circuit breakers and less harmonic DIS [11]. Particle Swarm Optimization used in cascade inverter to reduce harmonics improve output quality [12]. Cascade multilevel inverter is implemented by using the theory of vector space to switch strategies in the topology. The proposed topology reduces harmonic distortion and switching frequency employed switches [13].
This proposed converter, diodes clamped multilevel inverters (DCMLI) for different levels of switching angles are calculated using the dog leg in order to minimize the total harmonic distortion (THD), improve the quality of the electricity voltage wave form, the overall efficiency of the inverter, as well as to study the relations of levels with THD.

Methodology
Circuit diagrams of diode clamped multilevel inverters (DCMLI) 10, 18, 24 levels are shown in the Figures 1-3 respectively. DCMLI consists of two legs and each leg consists of two sub-systems connected in series. Each subsystem comprises ( ) switches. Every level of multilevel inverter has its own requirement of numbers of switches (IGBTs), batteries and clamping diodes. The components are calculated using Equations (1), (2) and (3) and shown in Table 1.
Switches of subsystem 1 are connected in series with subsystem 2 in one leg and similarly subsystem 3 with subsystem 4 in other leg. The output of the DCMLI is stepped stair case voltage levels as shown in Figure 5 for 10 levels DCMLI. To obtain different voltage levels and to eliminate lower order harmonics such as 3 rd , 5 th , 7 th , 11 th and 13 th , selective harmonic elimination technique is implemented using Trust Region Dog Leg, the flow diagram is shown in Figure 4. Dogleg utilizes Newton and steepest descent methods. The combination of these   two methods ensures a fast convergence and a solution of function in the steepest descent direction. The second step involves finding the value of trust region radius to estimate length of step for the current iteration such that the following condition is obeyed. Trust region dog leg optimization technique is utilized to find out the optimized switching angles using a set of non-linear equations derived to selectively eliminate specific harmonics (Selective Harmonic Elimination). The set of non-linear equations are shown in Equations (14), (15) and (16) and trust region dog leg method determines the optimized switching angles to result a wave form with minimum Total Harmonic Distortion (THD). For particular switching angle different switches are turned on, for 10 levels four switches and 8 for 18 levels and 11 for 24 levels are on in one leg and 4, 8 and 11 in another leg. Every switch is turned on and off only once in half cycle therefore the switching losses are low.       Table 3, Table 4. As shown in Figure 5 each half cycle of the output voltage is divided into multi-levels for optimized switching angles ( ) θ . The switching angles are determined using Fourier series to find system of non-linear equations and further "trust region dogleg" method is applied. Fourier series is applied first to find out a set of non-linear equations.
From Fourier series the periodic function can be expressed as following  Here T is the fundamental period and o t is arbitrary reference time. Multi-level inverters have odd quarter wave symmetry so they posse both odd and half wave symmetry. The Fourier coefficient for odd quarter wave symmetry simplifies to   , , , , s s s s  = subsystem 1 switches; 12 Equation (13) shows odd harmonics in DCMLI as switching angles. To eliminate 3 rd , 5 th , 7 th , 9 th , 11 th and 13 th harmonics and output peak voltage is controlled to v, harmonics equations results in The values of switching angles can be calculated from these set of non-linear equations using iterative method.
Equation (14) can also be written as The total harmonic distortion is calculated from the following equation

Results
Total harmonic distortion values and output voltage wave forms are observed for m = 0.9 and the variation in harmonics and the quality of output waveforms. The value of m is kept constant while total numbers of voltage levels in half cycle (0π) of output waveforms are increased gradually, when Voltage levels are increased the Table 5. Switching angles of 10 levels DCMLI.  Table 6. Switching angles of 18 levels inverter.  Table 7. Switching angles of 24 levels inverter. wave form gets closer to pure sinusoidal wave form and consequently the percent total harmonic distortion decreases. Total harmonic distortion (THD) depends on the 3 rd , 5 th , 7 th , 9 th , 11 th , and 13 th (in the proposed case) lower harmonics when levels are increased the harmonics results smaller peak values which decreases the THD value as shown in Table 8 and Figures 6-11 for various levels.

Conclusion
Trust region dog leg method employing optimized switching angles has reduced total harmonic distortion in multilevel inverters compared to when non-optimized switching angles are considered. It is evident from the       results that an increasing number of voltage levels in the output waveforms decrease the total harmonic distortion (THD) and the output wave form gets closer to pure sinusoidal voltage plus overall efficiency of the system rises. Moreover, the number of battery sources, IGBTs and diodes required makes the system bulkier and expensive as the number of levels is increased but ensures a sooth input to the industrial load (e.g. AC Motor Drive runs with maximum torque, less noise and maximum efficiency when the higher level of multi-level inverter output is fed to it).