Paralleled Dc-dc Power Converters Sliding Mode Control with Dual Stages Design

This paper proposes the new cascaded series parallel design for improved dynamic performance of DC-DC buck boost converters by a new Sliding Mode Control (SMC) method. The converter is controlled using Sliding Mode Control method that utilizes the converter's duty ratio to determine the skidding surface. System modeling and simulation results are presented. The results also showed an improved overall performance over typical PID controller, and there was no overshoot or settling time, tracking the desired output nicely. Improved converter performance and robustness were expected.


Introduction
Power electronics is the process and control of the flow of electric energy from a given source to a load in a shape that is optimally suited for its use.Modern electric systems demand high quality, reliable, efficient and light weight power supplies.
Higher power converters, such as the ones used in Electrified Vehicles (EVs) and aircraft power units, are also in increase demand as a result of the green acts taken on by many countries.The improvement in power switching devices such as the IGBTs and MOSFETs made the power electronics more appealing to many applications.Higher switching frequency, higher power capability and improved efficiency are the main reasons for the expanded application [1].
Paralleled DC-DC converters are used in telecommunication industry widely and operated under closed loop control to regulate the output voltage [2].The nonlinearities of the DC-DC converters are due to interaction among the converter components and the switching nonlinearity behaviors.However, linearized average model is commonly used for converter analysis [3][4][5][6][7][8][9].A draw-back of the linearized model is that it cannot predict the dynamics of the converter in a saturation region [2].For standalone converters, many nonlinear control approaches have been studied and proposed: Lyapunov based controllers [10][11][12][13], variable structure controllers VSC [14][15][16], feedback linearization method [17] and Fuzzy logic controllers [18].In [19], the sliding mode control is used and the results are shown for all types of converters (Buck, Boost and Buck-Boost).The results of this type of control where the state space averaging is applied to sliding mode control PWM converters, showed a good result but high ripple content on the buck-boost converter.
For paralleled DC-DC converters control, [2] proposed an Integral Variable Structure Control (IVSC) for N paralleled DC-DC converters.They emphasized that Variable Structure Control was a natural choice since the control and the plant are both discontinuous and have uncertainties.A fuzzy logic controller is proposed in [18] for the master slave concept of the DC-DC control, and the results showed robust and improved performance over classical linear control.In [20], the control is based on a steady-state DC model and a small-signal model, which showed that current sharing can be achieved without a dedicated current sharing controller.explored many of the concepts mentioned above and some of the chaotic behaviors of the converters.The papers are added for the readers' convenience to further explore the concept of the DC-DC converter control and behavior.
In this paper, we will introduce a concept to improve the output quality and simplify the paralleled converters control to a simple single like converter.We will use a Sliding Mode Controller (SMC) with the Variable Structure Surface Design concept developed in [44] to control the converter.A comparison with a PID controller is presented.

Modeling of Buck Boost Converter
In this section a model for N paralleled buck boost converters to supply a common load is developed.Figure 1 shows a commonly used buck-boost configuration for paralleled converters supporting a single load.This paper will introduce a new approach to controlling the converter to reduce the output harmonics and simplify the control to an equivalent of a single converter.First a single converter model is given by the following equations: ( ) ( ) The above equations show the model that the first section of the converter associated with, the switch 1 s takes on the values [ ] 0 1 .The current is the inductor current associated with the first inductor 1 L and C V is the capacitor voltage as a result of the contribution of all other converters.For multi converters the output current o i is the sum of all individual inductor currents and is given by the following equation.
The states are the inductor currents and capacitor voltage as shown in Equation (4).
[ ] , 1, 2, , m: number of converters Using Equation (3) and based on Equations ( 1) and (2) we can formulate the following relation.Given that the capacitor voltage is the same as the output voltage The derivative of the output current given by Equation ( 3) is shown in Equation ( 5) Substituting Equation (1) into Equation ( 5) and collecting the terms we get Equation ( 6) interim of the derivative of the load and capacitor currents.
where n S is the state of the n th switch.We determine from Figure 1 that the output voltage is equivalent to the capacitor voltage and the relation can be written in Equation ( 7) Taking the derivative of Equation (7) we get the following relation With the advancement in switches and their higher switching frequency capabilities we assume an infinite switching frequency.With this assumption we can assume that the rate of change in the capacitor voltage and current are zero, solving Equation ( 8) we get the following Equation ( 9) It can be seen that the second term of Equation ( 9) is related to the duty ratio ( ) d for the buck boost converter.The duty ration is defined as the turn on time as a percentage of the period defined as T .
Substituting the expression for d into Equation (9)  we determine the switching time as follows The above equation shows the distribution of the switching time for the m converters, the sum of all the switches contribution is equivalent to the duty ratio or the required on time of an equivalent single switch to provide the desired output.The contribution of each leg is an equal portion of the required output voltage and current.
The control methodology can vary from PID, VSC, Fuzzy logic, SMC or other methods, but the end results is the same as to determine the turn ON time for the switches.
Next an improved performance of the converter to reduce harmonics content is presented.It is proposed to do a harmonic cancelation by shifting the switching sequence of the converters, by imposing delay t on the subsequent converter legs using the following relation

Design of the New Converter Control
In this section we propose a new converter control design to simplify the overall control and improve performance.
In DC-DC converters control, the principle is to eliminate the error between the actual output and the desired output value.The control action is taking by switching the control device in this case a MOSFET to apply the input DC voltage to the converter periodically and proportional to the error.In this paper we propose separating the converter into two stages as discussed next.
The design consists of two cascaded stages where the first stage is the control stage shown in Figure 2 enclosed by the dashed lines and the second stage called the performance stage.
The performance stage represents m number of parallel converters to be controlled to reduce the harmonics contents of the output.This separation gives the designer the freedom to choose the switching frequency to optimize the performance of the converter.This frequency is independent of the control stage and can be optimized.
The converters switching time is determined in advance and the frequency can be optimized to reduce switching losses or improve EMI performance.The simulation will show the performance of the converter with synchronized switching time and also the enhanced performance with the shifted switching time as suggested above in Equation (12).
The control stage as shown enclosed in the dashed line in Figure 2 is used to control the input voltage to the paralleled converters.In previous converter designs the input voltage always assumed constant and the control was done by switching the converter at variable duty cycles to achieve the desired output values.In this paper we propose the idea of switching the output stage of the converter at an optimal switching frequency and duty cycle while controlling the input stage varying it to achieve the desired output value.
The control of the first stage through c S , as shown in Figure 3, is designed with the assumption that the parallel converters have an equivalent inductor and capacitor values if the control method requires knowledge of the parameters.The control can be done using, Variable structure Control (VSC), SMC, where parameter sensitivity is not an issue, fuzzy logic, PID or any other method desired by implementation engineers as the problem is reduced to a single converter control.

Sliding Mode Control of the Converter
In this section we will use sliding mode control to control the converter.The sliding surface used is a unique duty cycle dependent surface developed in [44].The controller then derived using the sliding surface coefficients.In [44] a Variable Structure Control (VSC) surface design for DC-DC power converters is presented.The design was done for the Buck boost converter and can be extended and applied to all types using the methodology explained in [44].
Consider the linear time invariant system given by Equation ( 13).

[
] [ ] The states are defined as the inductor current and the capacitor voltage which the same as the output voltage.
Given the surface as defined in [14,15].
( ) Using Equation (13) to Equation ( 15) we get the equivalent control discussed by Utkin [16,29].It is developed to derive the sliding mode equations into the manifold ( ) 0 s x = and then the solution to ( ) 0 s x = is called the equivalent control eq u .
( ) The method in [44] defines the surface in term of the duty cycle and the parameters of the DC-DC converters as in Equation (17).
( ) where ( ) Are the errors between the actual values and the desired one.Taking the derivative of Equation ( 17) we find the value of C, the surface coefficients, as [ ] Using the value of C in Equation ( 18) and the given A and B coefficients of the system and evaluating Equation ( 16) to get the equivalent control eq u .
( ) The total control of the system consists of two com-ponents the equivalent control eq u and corrective con- trol c u , where the equivalent control is used to reach the surface while the corrective is to keep the system on the surface.
For system stability, we need to guarantee the system ends up and stays at the surface regardless of the initial conditions.Using the following Lyapunov function: We need to grantee that the derivative of Equation ( 21) is negative definite that is 0 V <  for all ( ) 0 S x ≠ , that from any initial condition.Taking the derivative of ( 21): ( ) where K is appositive number.Hence the complete control is given by Equation ( 20) is: where Q and W are the coefficients derived in [2] and given below: L : Inductor value C : Capacitor value R : Load Resistor Value J : Associated Jordan value associated with the selected eigen values.
L and l: Arbitrary positive numbers d : Duty ratio In the next section we will show the results of the application of the hyper plane coefficients in the proposed two stage converter and compare to the results to a conventional PID controller.Although a comparison will show an improvement over the conventional method in term of overshoot and settling time, the main purpose of the application to test the feasibility of the method developed in [44] and introduce the proposed two stage converter.
Figure 4 shows a single Buck Boost converter.Figure 5 shows paralleled buck boost converters.Both converters, the single or the paralleled are to regulate the output voltage to a desired value ref v and provide loads with the desired currents.Figure 6 shows the sliding mode controller as given by (24).
In the next section will show and compare the results of using a single converter, parallel converters, paralleled converters with the enhanced mode and the developed hyper plain coefficients method [44].

Results
The converter shown in Figure 4 represent a single Buck Boost converter based on the mathematical model described in ( 1) and ( 2).The converter was controlled using a PID control and sliding mode control with the developed hyper plain coefficients and simulated using the following circuit parameters: in l 10 mh, 10 μF, 10 Ω, In the second part of the simulation, the converters are paralleled and the new two mode design is implemented.
The same values as the single converter are used with a mismatch of 10% to represent a more realistic situation.However for sensitive applications more precise value components can be chosen.Figure 5 shows the converters constructing a paralleled structure for the benefits mentioned earlier in the previous sections.The last part of the simulation was done using the delayed switching time as in (12) to further improve the performance.
First part of the simulation is of the single converters with the values given above.The results are shown below in Figure 7.The second part is the simulation Figure 8 is for the paralleled converter with a fixed duty cycle for all the converters in the performance stage.The third part Figure 9 is the results for the paralleled converters with the proposed switching delay as suggested by Equation (12).
Figure 7 shows the output voltage of a single converter regulated at 80 volts, the output is clearly showing the mount of ripple on the output voltage exceeds 5 V.The increase in the amount of ripples on the system voltage would cause increase losses reducing efficiency and can contribute to the mechanical wear and tear of a system.
Figure 8 shows the improved performance of the system by reducing the output voltage ripple to less than 1 V.This improvement is important as to increase system efficiency and improve its performance.In systems such as electric motors for example, this improvement can translate into increased reliability and reduction in maintenance cost.
Figure 9 shows further improvement in the sense of ripple reduction and more importantly significant reduction in harmonic content of the output.The use of the     Figure 10 shows further improvement on the overall performance of the converters by reducing the ripple and improving the system response to eliminate any overshoot or oscillations.Figures 11(a) and (b) show he best performance with elimination of ripples and reduction in harmonics content, better system response as the desired voltage is being reached without the overshoot or oscillations.

Conclusions
This paper develops a paralleled Buck Boost DC-DC converter with two stages named the control and the performance stages.The control stage performed a manipulation of the input voltage whereas the performance stage was designed to improve further the quality of the output.The quality is measured by reducing the ripples, hence reducing power lost and increasing system reliability.
The converter is controlled using Sliding Mode Control method.The sliding surface in the controlled is developed to be dynamic and duty cycle dependent.This dynamic hyper plane or sliding surface showed an expected improved performance.The results also showed an improved overall performance over typical PID controller, and there was no overshoot or settling time, tracking the desired output nicely.The enhanced mode in combination  with the sliding mode control has shown a reduction in harmonics in comparison to the SMC without the delayed enhanced mode.
With the increasing demand of large power load and the development of distributed power supply system, the importance of research on paralleled power supply modules is increasing, while achieving an equivalent current sharing between the modules is the key element.In future work, the current-sharing control will be presented and compared with other existing ones.

Figure 3 .
Figure 3.The proposed two stage converter.
(22) holds the corrective control c u is chosen as follow.

Figure 4 .
Figure 4. Simulink model of a single buck boost converter.

Figure 5 .
Figure 5. Simulink model of six paralleled buck boost converters.

Figure 6 .Figure 7 .
Figure 6.Simulink model of the control circuit as given in Equation (24).

Figure 8 .
Figure 8.Output voltage, switched input respectively for paralleled converters with constant duty cycle at the performance mode.

Figure 9 .
Figure 9. Output voltage, switched input voltage respectively for paralleled converters with enhanced duty cycle at the performance mode.

Figure 10 .
Figure 10.Output voltage, switched input voltage respectively for paralleled converters with constant duty cycle at the performance mode using SMC.

Figure 11 .
Figure 11.Output voltage, switched input voltage respectively for paralleled converters with enhanced duty cycle at the performance mode using SMC.