High-Impedance Bus Differential Protection Modeling in ATP / MODELS

This paper presents a modeling of a high-impedance bus differential protection logic using the ATP (Alternative Transients Program) MODELS language. The model is validated using ATP simulations on an electrical system consisting of a sectionalized bus arrangement with four transmission lines (TLs) and two autotransformers. The obtained results validate the model and present some of the advantages of using this type of bus protection, such as fast and safe operation, even when under adverse conditions such as current transformers (CTs) magnetic core saturation upon the occurrence of external faults.


Introduction
The increasing demand for energy supplies and lower fares cause the electricity sector to operate close to its stability limits, which may compromise the safety of its operation.In this context, the protection of electric power system plays a key role in order to extinguish system faults quickly and appropriately, preserving the integrity of the system components, avoiding blackouts of major proportions and preserving load as much as possible.
Among faults in electric apparatus, substation (SE) bus deserves serious attention.Even though faults in these components are not very common-about 5%- [1], its effects are very harmful to the system, and can often lead it to instability.
With respect to the station-bus protection, two techniques are widely used: low impedance differential protection and high-impedance differential protection.The second one is typically used in SEs with rated voltage greater or equal to 500 kV, where buses have arrangements with fixed topology and there are less occurrences of switching maneuvers in CTs secondary circuits.
Softwares traditionally used for analysis of protection systems use component models dedicated to the analysis of the power system at fundamental frequency.As a result, the transient performances of the protection systems are not evaluated.In this way, EMTP (Eletromagnetic Transient Programs) softwares have shown to be an appropriate alternative for modeling and simulating protective relays, since they use more thorough models of the system components and provide suitable environments to link user-defined numeric relays models.
In the state-of-art of relay modeling in EMTP software, most papers on the subject deal with the transmission lines (TL) distance protection [2][3][4][5].In [2], a distance relay is modeled in EMTP program and its performance is compared with the one of a manufactured relay.In [3] and [4], distance protection schemes applied to three terminals line and double circuit lines are evaluated, respectively.In both researches, the relay is modeled with the use of MODELS language of ATP.In [5], a Visual C++ based program is implemented to obtain the FOR-TRAN code that represents the functional blocks of the relay, which is incorporated in a PSCAD/EMTDC simulation.
To the authors' best knowledge, there are no papers in the state-of-art that present high-impedance bus differential protection modeling and simulation in EMTP softwares, which became the motivation and objective for the development of this paper: propose, implement and validate a high-impedance bus differential protection model in ATP for use in power system protection schemes analysis.
The proposed model of the numerical differential protection was done using MODELS language of ATP and can be divided into four modules: signal condition, data acquisition, phasor estimation and differential analysis.The first one implements the model of an anti-aliasing analog filter.The second one implements the models of the Sample/Holder and A/D Converter.In the third module, the phasor's amplitude and argument are calculated in the fundamental frequency.Finally, the high-impedance bus differential protection logic is implemented in the fourth and last module.
The model is validated using ATP simulations on an electrical system consisting of a sectionalized bus arrangement with four transmission lines (TLs) and two autotransformers.The obtained results validate the model and present some of the advantages of using this type of bus protection.

Fundamentals of High-Impedance Bus Differential Protection
In order to understand the systematic of high-impedance bus differential protection, a single bus arrangement with four transmission lines will be used (Figure 1).
To accomplish the differential protection closed loop, the physical parallel connection of the CTs secondary is necessary, as shown in Figure 1.The connected CTs must have the same ratio in order to minimize the difference in performance between them.
As shown in Figure 1, the high-impedance bus differential relay internal elements are applied to the common node of all CTs.R s is the stabilizing resistance, which has typical value of 2000 Ω, and determines the highimpedance input of the relay.
The 87Z element is a sensitive, low-impedance, adjustable pick-up current element scaled in voltage [6].Since the branch current formed by these two components is low, the high-impedance bus differential relay trip becomes dependent on voltage in its terminals.
The Metal Oxide Varistor (MOV) is a non-linear resistance connected across the high-impedance circuit to prevent high voltage from damaging the relay and CT circuitry [6] .
The instantaneous overcurrent relay (50) and timed overcurrent relays (51) control the breaker opening, during abnormal conditions of operation of the system which cause high current magnitudes.
The high-impedance relay is set to trip based on the relay pickup threshold ( ) pick up V − .This value must be set above the highest voltage measurement across the relay with a completely saturated CT for external faults conditions.This ensures safety for external-fault protection.

Normal Conditions and External Faults without CT Saturation
In Figure 2, CT A represents the parallel combination of the CTs of circuits 1, 2 and 3 of the electrical system in Figure 1 and the constant current source, T Î' , represents the sum of their secondary currents.CT B represents the CT of circuit 4 and the constant current source 4 Î represents the current in its secondary circuit.
In normal conditions or external fault condition without CT saturation, the current source value of CT A will be close to zero and nearly the same as the one of CT B. Any current difference is forced through the high-impedance relay.Thus, the voltage across s R and the MOV is very low:

External Fault Conditions with CT Saturation
In case a fault in circuit 4, the resulting current from the parallel combination of the CTs in the circuits 1, 2 and 3 flows through TC4 and may lead to saturation of its core.The voltage across the relay is the same as the one across the series association of L R with TC R .Thus, the set- ting pick up V − must be such that the relay will not operate for this situation.In this case, the current through the MOV is very low.
As shown in Figure 3, the voltage magnitude, ˆR V , across the relay under through-fault conditions with fully saturated CT can be obtained as [6]: where, TC R is the CT secondary winding resistance; k = 1 for three-phase faults and k = 2 for single-phaseto-ground faults; l R is the one-way resistance of leads; RTC is the CTs ratio; Î f is the minimum fault current.

Internal Bus Faults
In case of bus faults, the resulting current from the parallel of the CTs will be applied to the relay, as shown in Figure 4, and the MOV will limit the voltage across the relay at its rated voltage in order to prevent any damage to the relay or wiring.For numerical relays, the performance evaluation is based on the magnitude of the estimated voltage phasor at fundamental frequency across the stabilizing resistance.

High-Impedance Bus Differential Relay Modeling
The representation of the s R and MOV elements of the high-impedance bus differential relay were made as a resistance and a non-linear resistance (type 92) in ATP, respectively.The s R value was taken as 2000 Ω and the MOV rated voltage as was taken as 1.3 kV.The MOV current x voltage characteristics may be seen in Figure 5.     • A/D Converter: This submodule is responsible for quantization process of the output signal from earlier stage.The sampled signal is converted to a 16-bit binary word with a two's complement number system encoding.The conversion is done by the method of Successive Approximations.The resolution of the converter and the digital words in the base 10 for positive and negative numbers is given, respectively, by: where x is the model input, Y is the converter maximum symmetrical excursion, Res is the converter resolution, INT is the truncation operation and RON is the rounding operation.From de values of b + 1 = 16 and Y = 10, one can get the converter resolution equal to 3.0518 × 10 −4 .The model output is the floating point (FP) equivalent of the binary value Z 10 , which is given by the following expressions:

Phasor Estimation
• Buffer: Array used for storing the data required for the phasor estimation algorithm.For the Modified Cosine Filter algorithm [7] and a sampling rate of 16 samples/cycle, a 17 samples buffer is required.• Cosine Filter: In order to eliminate the decaying DC component from the current and voltage fault signals, the Modified Cosine filter [7] was used.The authors of the algorithm showed that, with two consecutive outputs of the traditional cosine filter and a correction factor, it was possible to obtain a satisfactory result in the elimination of the decaying DC component.

Differencial Analysis
Finally, the high-impedance bus differential relay evaluates the voltage on its terminals based on the estimated voltage phasors from previous staged.When the voltage magnitude is higher than a pre-established value, pick up V − , the relay sends a trip signal to the breakers in order to isolate the fault.

Breakers
The breaker model provides the status of the breakers in the simulated system.The real breakers opening delayrelated to the time for energizing the opening coil, open-ing the contacts and extinguishing the electric arc-is referenced in ATP as an intentional delay.This delay is taken as 2 cycles of the fundamental frequency, what, for 60 Hz, is equivalent to 33.333 ms.The breaker model also guarantees that the ATP switch only opens when the current is equal or very close to zero.

The Simulated Power System
For the model validation, an electrical system consisting of a sectionalized 230 kV bus arrangement with four transmission lines and two autotransformers was used.
The transmission lines are 100 km each and are modeled as fully transposed, with distributed and constant with frequency parameters.Two of them are connected to Bus 1 and two of them to Bus 2. The autotransformer 1 has rated voltage of 230/69/13.8kV, is modeled as a saturable transformer and is connected to Bus1.The autotransformer 2 has rated voltage of 500/230/13.8 kV, is modeled as a saturable transformer and is connected to Bus 2. The CTs used are C800 1200-5 A, whose models were reported in [8].The resistances of CTs secondary circuit and its cables are TC R 0.75 = Ω and TC R 2 = Ω, respectively.
For maximum selectivity, two protection zones-one for each of the bus' sections-are used.The first one encompasses the CTs of TLs 1 and 2, the autotransformer 1 and the CT of the tie breaker, whereas the second one encompasses the CTs of TLs 3 and 4, the autotransformer 2 and the CT of the tie breaker.The substation single line diagram with the corresponding protection zones may be seen in Figure 7.The diagram of the parallel interconnection of the first zone CTs is shown in Figure 8.The CTs of the second zone are connected similarly.
The system's parameters are presented in Tables 1 and  2. The first one contains the TLs' parameters and the second one presents the zero and positive sequence Thévenin equivalents and the amplitude and phase of the cosine voltage sources.By obtaining the single-phase and three-phase faults' current contributions to the zones 1 and 2 of the considered bus of zones 1 and 2, the value of pick up V − can be calculated for each zone considering the worst voltage scenario at the terminals of the relay:

Simulations and Results
For a performance analysis of the implemented model, bolted three-phase simulations were performed at Bus 1 and at transmission line 3.
The zone 1 relay should trip when the voltage phasor's magnitude in its terminals exceeds the V pick −up value adjusted: 600.4 V; and, similarly, the zone 2 relay should trip when this value exceeds 539.1 V.

Three-Phase Fault in Bus 1
For three-phase faults in Bus 1, the maximum magnitude of voltage phasor at the terminals of the relay exceeded the value of 600.4 V, leading to a correct trip in zone 1, as shown in Figures 9(a), (c) and (e).As expected, zone 2 did not trip, as shown in Figures 9(b), (d) and (f).The voltage at the terminals of the relay was safely clamped to the MOV rated voltage of 1.3 kV.As seen in Figure 9, due to the MOV operation, the voltage developed across the relay was nonsinusoidal.The operating time of the relay was 15.625 ms (or 0.96 cycles).

Three-Phase Fault in Transmission Line 3
From the analysis of Figures 10, the relay did not operate for an external fault on TL 3, as expected.It can be seen that the voltage phasor magnitude was approximately zero throughout all the simulation period, guaranteeing the safety of the protection system.In this case, the protection scheme of transmission line 3, not included in this paper, should operate to extinguish the defect.

Conclusions
This paper presented the fundamental concepts of highimpedance bus differential protection and an innovative approach for its modeling and simulation using the MODELS language in ATP software.The obtained re-sults validated the model and presented some of the advantages of using this type of bus protection.This paper also addressed the role of protection in the event of outbreaks in the electrical system, but the research, still under development, aimed the inclusion of more thorough analysis of the model and the protection scheme.Some ideas for future researches include: • Analysis of high-impedance bus differential protection applied to other bus arrangements.• Inclusion of more elements to the considered bus, such as other transmission lines, transformers, reactors, shunt capacitors, among others.• Implementation of other protection schemes at the same bus in order to compare their advantages and disadvantages.

Figure 1 .
Figure 1.Example of high-impedance bus differential relay schematic.

Figure 1 .
Figure 1.Equivalent circuit of CTs for normal conditions and external faults without CT saturation.

Figure 3 .
Figure 3. Equivalent circuit of CTs during external bus faults.

Figure 4 .
Figure 4. Equivalent circuit of CTs during internal bus faults.
Trip signal -Br n

Figure 9 .
Figure 9. Voltage in relay terminals in occurrence of the three-phase fault in bus1: (a) Phase A of zone 1; (b) Phase A of zone 2; (c) Phase B of zone 1; (d) Phase B of zone 2; (e) Phase C of the zone 1; (f) Phase C of zone 2.

Figure 10 .
Figure 10.Voltage in relay terminals in occurrence of the three-phase fault in TL 3: (a) Phase A of the zone 1; (b) Phase A of the zone 2; (c) Phase B of the zone 1; (d) Phase B of the zone 2; (e) Phase C of the zone 1; (f) Phase C of the zone 2.
[4]nalog Filter: The analog filter is responsible for attenuating the CT's high frequency components and preventing the occurrence of aliasing effect in the sampling process.In the model relay, an analog third-order low-pass Butterworth filter is employed[4]: Figure 6.High-impedance bus differential relay model.