Defect and Temperature Effects on Complex Quantum-Dot Cellular Automata Devices

The authors present an analysis of the fault tolerant properties and the effects of temperature on an exclusive OR (XOR) gate and a full adder device implemented using quantum-dot cellular automata (QCA) structures. A Hubbard-type Hamiltonian and the Inter-cellular Hartree approximation have been used for modeling, and a uniform random distribution has been implemented for the simulated dot displacements within cells. We have shown characteristic features of all four possible input configurations for the XOR device. The device performance degrades significantly as the magnitude of defects and the temperature increase. Our results show that the fault-tolerant characteristics of an XOR device are highly dependent on the input configurations. The input signal that travels through the wire crossing (also called a crossover) in the central part of the device weakens the signal significantly. The presence of multiple wire crossings in the full adder design has a major impact on the functionality of the device. Even at absolute zero temperature, the effect of the dot displacement defect is very significant. We have observed that the breakdown characteristic is much more pronounced in the full adder than in any other devices under investigation.


Introduction
Quantum-dot cellular automata (QCA) is a transistorless computing paradigm at the nanoscale.Circuit functions are realized through cooperative quantum-mechanical interactions between electrons confined in arrays of quantum dots.The devices are smaller, faster, and consume less energy than existing complementary metal-oxidesemiconductor (CMOS) technology.The signal is propagated through Coulombic interactions and utilizes bistable polarization states "0" and "1" to represent the binary states for computation.As the computing industry moves forward, faster and smaller devices are developed, each more capable than the last.But the increasing density of conventional microelectronic devices at the nanoscale generates a heat problem as well as quantum mechanical effects that interfere with the correct operation of the devices.
Since QCA devices perform their operations and store the results of those operations using the locations of individual electrons, there could be concern that they are more susceptible to thermal effects and fabrication imperfections than conventional CMOS devices.In order to develop a viable and usable QCA model, it is necessary to understand the behavior and robustness of QCA devices.Specifically, the effects of cell misalignment, dot displacement, thermal effects, and other faults must be thoroughly investigated.Several researchers have investtigated the fault tolerant properties and characteristics of QCA systems .Wire crossings have been a par-ticular area of interest as it concerns robust device operation, and several researchers have proposed ways to improve or reduce the number of wire crossings in QCA devices [71][72][73][74][75].
In this article, we expand on our previous work in this area to investigate the fault-tolerant characteristics and thermal behavior of two more complex QCA devices: the exclusive-OR (XOR) gate and the full adder.Special attention is paid to the wire crossings used in these complex devices, and it is demonstrated that the thermal behavior and defect tolerance of these complex devices are determined almost exclusively by the wire crossings they use.In Section 2, we present the theoretical methodology and formalism to be used, Section 3 presents the results and discussion of those results, and these are followed by a summary and conclusions in Section 4.

Theory and Methodology
An extsended Hubbard model is used to describe the behavior of a QCA cell.For an array of cells, either the full Hamiltonian [61][62][63][64], or an approximation method, like Inter-cellular Hartree Approximation (ICHA) [3], can be used.As fully described in [65], this work will use the ICHA method and the following Hamiltonian for a single QCA cell (Equation ( 1)).
The first term of this equation represents the cost to confine each electron to a quantum dot.In this term, the on-site energy (E 0 ) is set equal to 130.6 meV for a silicon semiconductor.The second term allows for the possibility that both electrons will occupy the same site within their cell.This comes at a high cost, though, as the on-site charging cost (E Q ) is found to be 846 meV.The third term represents the Coulombic interactions between the electrons in cell a and those in cell b, including the neutralizing background charges.V Q = e 2 /4 π is a fixed parameter based on fundamental constants and the dielectric of the material.The fourth term represents the Coulombic interactions between the pair of electrons within cell a.The fifth term accounts for the effects of the driver cell, and the sixth term allows for tunneling among the five sites that compose each cell.The tunnel-ing coefficient, t i,j , is 0.3 meV for neighboring sites.
This representation of the Hamiltonian makes use the second quantization representation of the creation, annihilation, and number operators.This terminology provides a convenient and compact representation for the movement and Coulombic interactions among electrons in a many-body problem.
To use the ICHA approximation, we determine the full Hamiltonian within the cell (H 0 ) and then approximate its interactions with the other cells by calculating H 1 based on a current estimate of the environment.The full Hamiltonian is calculated by adding these two matrices together: Using the canonical occupation number basis for the Hilbert space, the matrices of second quantization operators are calculated, and the quantum averages are numerically computed.Quantum averages for the number operators are the probabilities of localization for specific dots: where: Taken together, Equations ( 3) and ( 4) allow us to determine the expected value of the charge density on each site of the cell, given a tentative estimate of the environment contained in H 1 .This calculation is performed for every cell in the device, and the results of that calculation are then used as the (somewhat less) tentative basis for a new round of calculations.In this way, the solution is reached by iterating until the result is self-consistent.At that point, every cell in the device is in a state that is in perfect agreement with the now finalized states of all the other cells surrounding it.
In previous work, we have introduced graphical, analytical, and simulation models for the study of fault-tolerance characteristics of a QCA device [62][63][64][65][66][67][68].A brief description will be given in this article.Defects in a QCA ˆˆ, system can be either operational or manufacturing.The factors contributing to operational defects include the effects of temperature, entropy, stray charge, etc. Manufacturing defects can be found at both the cell and/or the device levels.Device defects are associated with the placement and/or orientation of entire cells.These defects may consist of cell translation in a vertical or horizontal direction, cell rotation in a clockwise or counterclockwise direction, or the complete absence of a cell within an array.The cells may be perfect, but the way the cells are placed may cause an error in the function.At the cell level, the dots could be misplaced, deformed, and/or missing.Out of many possible manufacturing defects at the cell and device levels, we discuss the fault tolerance properties due to dot displacement within cells on QCA devices.As the spacing between dots is changed from their ideal locations, the tunneling energy between them also changes.
We have introduced a double-well potential barrier model to obtain tunneling coefficients for fixed electron energy [62,65].A plot of tunneling energy as a function of inter-dot distance was shown in [65].The physical parameters such as the intercellular distance (60 nm), standard spacing between two dots (20 nm), and the diameter of a dot (10 nm) are used for the entire investigation.A schematic diagram is shown in Figure 1.
A uniform random distribution technique is used to simulate misplaced dots within the cells.In order to simulate the random displacements of the dots, an analytical model has been developed based on the geometry of the QCA model shown in Figure 2 [65].Using the analytical model, the new position of a dot is obtained by: Here, r 0 is the original position of the dot with respect to the origin, a is the standard distance between the two dots in a cell and  is a random vector representing variability in the locations of the dots.Here,  is a dimensionless quantity defined as the displacement factor (DF).The value of this parameter determines the amount of displacement of the dots from their ideal locations.Its value lies between zero and a maximum value of 0.   The number of displacement factors and the number of trials used in the full adder study is reduced due to the significant time required for each simulation.
The fault-tolerant properties are measured by a pa-rameter called success rate, which is defined as the ratio of the number of successful outputs to the total number of trials in the simulation.If the polarization of the output cell is greater than or equal to 0.5 of the polarization of the input cell  out input then it is counted as a successful run.Results are analyzed as a function of displacement factors for various temperatures.The specific displacement factor at which the device fails to operate is defined as the breakdown displacement factor (BDF).Therefore, the BDF is the displacement factor at which the success rate starts to fall from its maximum value of one. 0.5 P P 

Results and Discussions
An Exclusive OR (XOR) gate is relatively simple to create with traditional CMOS technology, but in the twodimensional world of QCA, device fabrication difficultties arise.The Boolean logic for an XOR is C AB AB   , so the device will require two inverters, two AND gates, an OR gate, binary wires to connect the gates, and a wire crossing.
The first QCA XOR gate was designed with sixty-four cells and is shown in Figure 2(a) [3,7].In this article, we summarize the results of all possible four inputs (00, 10, 01, 11) and then compare these with the results obtained for a wire crossing.For input 00 and 10, the success rate as a function of displacement factor are plotted for four different temperatures, T = 0, 1, 2, and 3 K and discussed [68].It is observed that the general characteristics of the XOR 01 and XOR 11 are similar to the XOR 00 and XOR 10, respectively.Both the XOR 10 and XOR 11 fail to operate with even an infinitesimal dot displacement defect at absolute zero temperature.To reduce confusion, only the fault tolerant characteristic results are plotted at absolute zero temperature and shown in Figure 3.The general trend of the curves of the XOR 00 and XOR 01 are similar to the basic logic gates [68] and the XOR 11 and XOR 01 graphs are comparable to the wire crossing.After much investigation, the difference was determined to be due to the inclusion of the wire crossing in the XOR device.As mentioned earlier, to get a strong signal from the AND gates (with a fixed 0 input) one should put emphasis on the fact that both incoming signals from the inputs A and B must provide adequate impact to override the fixed input when necessary.
If the incoming signals are not strong enough for the AND gate to operate properly, the gate cannot produce a strong outgoing signal for the next stage in the device.For the XOR 00 and the XOR 01, the first input (0) reaches the bottom AND gate by passing through the bottom binary wire.This signal is less interfered by other cells and components of the device.This input and the fixed 0 input on the AND gate override whatever comes through the crossover.Thus, the AND gate produces a strong signal for the next stage for computation in the device.In this circumstance, the effect of temperature seems to be irrelevant.We conclude that the cause of the poor functionality for specific input configurations of the XOR has been determined to be the wire crossing that is in the middle of the device.
In order to improve the operation of the XOR, its design has been revised.The improved XOR device, which is made with fifty-seven cells, is shown schematically in Figure 2(b) [67].The vertical path (the wire crossing) in the middle part of the device is doubled up, and a rotated-cell inverter has been incorporated to reduce the size and the number of cells of the gate.Plots of success rate as a function of displacement factor for all possible inputs are shown in Figure 4(a).The general characteristics of the 00 and 01 curves are similar as observed in the previous design.Similarly, the results of 10 and 11 curves are nearly identical.These results are compared with the results of the previous design and shown in Figure 4(b).One may notice that there is not much significant change or improvement in the operation of the device.The BDF for the XOR 11 of the original design is 0.004 [68] and the BDF for the improved design is 0.008 at 0 K.We already reported that the BDF for the wire crossing at 0 K is 0.015 [68].
The results indicate that the wire crossing is the weakest piece of the XOR design, and doubling it does not significantly improve its performance.To construct a functional XOR, either vertical inputs could be used to avoid crossing signals, or the use of clocking could be introduced.
Finally, we show the fault-tolerance properties of a single-bit full adder made with 192 cells [5,7].The layout of the design is shown in Figure 5(a).The success rate as a function of displacement factor for the full adder has been studied at 0 K, and these results are shown in Figure 5(b).The value of the breakdown displacement factor is approximately 0.0025, which is a very small number.We see that the fault-tolerance characteristic due to dot misalignment in the device is very similar to that of XOR 11.From this investigation, we find that the fault tolerance at absolute zero is only a few thousandths of a percent.
Comparing the results of other devices studied by our group, the full adder is the most vulnerable device to the misalignment defect.Both the XOR and full adder QCA designs are large and complex.Even at absolute zero, the tolerance of the devices with a minute defect is very poor.Therefore, we conclude that a revised design and signal transfer model is needed for the large-scale complex devices and hence the QCA architecture.A pipelined clocking model for the XOR and the full adder is under investigation and will be reported soon.and full adder QCA devices.An extended Hubbard-type Hamiltonian and Inter-cellular Hartree approximation have been used for modeling, and a uniform random distribution has been utilized for the study of positional defects within QCA cells.The robustness of a device to fault tolerance and thermal effects is characterized by Success Rate, which is the probability that a device will operate correctly given a particular temperate and displacement factor, and the Breakdown Displacement Factor, which is a measure of how much the dot locations can vary before the device fails to operate properly.A summary of success rate of all possible input configurations for the XOR device has been shown for various displacement factor values.The results are compared with the success rate values of the wire crossing which is one of the basic components in the large-scale device.Results for the two input values, XOR 11 and XOR 10, are comparable to the crossover.In addition, a summary of the Breakdown Displacement Factor as a function of temperature is shown.The Breakdown Displacement Factor values decrease with temperature, indicating that thermal effects compound with manufacturing imperfecttions to cause device failure more quickly.We conclude from these observations that the presence of the wire crossing (or crossover) in the middle part of the design plays a significant role on the functionality of the device.

Summary and Conclusions
Attempts were made in the current work to improve the functionality of the crossover in the XOR design.Even with these modifications, the wire crossing still proved to be the weak link in the design.Results of success rate as a function of displacement factor of a singlebit full adder have been studied at 0 K.The device is extremely sensitive to any misalignment of the dots within the cells at absolute zero.The failure of the device is observed at  = 0.0025 displacement factor value.It is certain that the combined effect of temperature and dot displacement will make the result worse.In conclusion, we suggest that the wire crossing structure used in these two devices is a weak component in large-scale QCA devices.In order to improve the functionality of a largescale QCA device, the wire crossing structure used here should be eliminated by the use of clocked signals.The problem is under investigation and we plan to report the new methods and design soon.

5 .
The value of zero corresponds to the ideal positions of the dots and the value of  = 0.5 represents the maximum displacement, when two dots can just touch each other.It should be mentioned here that the dots are allowed to displace in a uniform random manner in all cells except the driver and the output cells.In this paper, we consider 50 values of the displacement factor (with ε = 2000 simulation trials) for the XOR device and 20 values of the displacement factor (with  = 1000 simulation trials) for the full adder.

Figure 3 .
Figure 3. Results for the 64-cell XOR and the crossover: Success rate as a function of displacement factor at 0 K for all inputs.
Fault-tolerance properties have been studied for XOR

Figure 4 .
Figure 4. Simulation results for the 57-cell XOR design: (a) Success Rate versus Displacement Factor and (b) Comparison of 57-cell results with 64-cell XOR design at 0 K.

Figure 5 .
Figure 5. (a) The layout of a Full adder QCA made with 192 cells.Success rate rate vs. displacement factor at 0 K for the (b) full adder with input ABC in = 111.