Prof. Ashok Srvastava

Division of Electrical and Computer Engineering, School of Electrical Engineering & Computer Science
Louisiana State University, U.S.A.

Professor of Engineering

 

Email: ashok@ece.lsu.edu, eesriv@lsu.edu

Qualifications

1975 Ph.D., Indian Institute of Technology, India

1970 M.Tech., Indian Institute of Technology, India

1968 Master of Science, Physics, University of Lucknow, India

1967 Bachelor of Science, Physics, University of Lucknow, India

Publications (selected)

1. Y. Banadaki and A. Srivastava, “Investigation of the width-dependent static characteristics of graphene nanoribbin field-effect transistors,” Solid-State Electronics, pp. 1-11, 2015 (in press). http://dx.doi.org/10.1016/j.sse.2015.05.003.
2. Y. M. Banadaki and A. Srivastava, “Scaling effects on static metrics and switching attributes of graphene nanoribbon FET for Emerging Technology,” IEEE Trans on Emerging Topics in Computing (Special Issue), pp. 1-10, 2015 (in press).
3. S. Chen, L. Peng, Y. Hu, Z. Zhao, A. Srivastava, Y. Zhang, J.-W Choi, B. Li and E. Song, “Powering Up Dark Silicon: Mitigating the Limitation of Power Delivery via Dynamic Pin Switching,” IEEE Trans on Emerging Topics in Computing (Special Issue), pp. 1-25, 2015 (in press).
4. S. Varshney, M. Goswami, B.R. Singh, and A. Srivastava, “Low power-variable resolution analog-to-digital converter,” J. Low Power Electronics, vol. 10, no. 2, pp. 236-246, June 2014.
5. K. M. Mohsin, A. Srivastava, A. K. Sharma and C. Mayberry, “A thermal model for carbon nanotube interconnects,” nanomaterials (Special Issue: CNT based Nanomaterials), Vol. 3(2), pp. 229-241, 2013.
6. A. Srivastava, Y. Xu, Y. Liu, A.K. Sharma and C. Mayberry, “CMOS LC voltage controlled oscillator design using carbon nanotube wire inductors,” ACM J. Emerging Technologies in Computing Systems (Special Issue), vol. 8, no. 3, Article 15, pp. 15.1-15.9, August 2012.
7. R. Soundararajan and A. Srivastava, “A programmable oversampling CMOS delta-sigma analog-to-digital converter for low-power interface electronics,” J. Low Power Electronics, vol. 8, no. 3, pp. 336-346, June 2012.
8. Y. Liu and A. Srivastava, “CMOS phase-locked loop circuits and hot carrier effects,” to appear in J. Low Power Electronics, vol. 8, no. 3, pp. 304-316, June 2012.
9. R. Soundararajan, A. Srivastava and S. Yellampalli, “Delta-IDDQ testing of a digital-to-analog converter considering process variation effects,” Circuits and Systems, vol. 2, pp. 133-138, 2011, DOI: 10.4236/cs.2011.23020 Published online July 2011, Scientific Research, U.S.A.
10. Y. Liu, A. Srivastava and Y. Xu, “Switchable PLL frequency synthesizer and hot carrier effects,” Circuits and Systems, vol. 2011, no. 2, pp. 45-52, January 2011, DOI: 10.4236/cs.2011.21008, Published online January 2011, Scientific Research, U.S.A.
11. A. Srivastava, Y. Xu and A. K. Sharma, “Carbon nanotubes for next generation very large scale integration interconnects,” J. Nanophotonics, (invited paper - online), special section on carbon nanotubes, vol. 4, 041690 (17 May 2010), pp. 1-26, 2010. DOI: 10.1117/1.3446896.
12. Y. Xu and A. Srivastava, “A model for carbon nanotube interconnects,” Int. J. of Circuit Theory and Applications, vol. 38, Issue 6, pp. 559-575, 2010. Published online: 2 March 2009 by Wiley InterScience, DOI: 10.1002/cta.587, pp. 1-17, 2009.
13. Y. Xu, A. Srivastava and A.K. Sharma, "Emerging carbon nanotube electronic circuits, modeling and performance," VLSI Design (invited paper - online), vol. 2010, Article ID 864165, pp. 1-8, 2010. DOI: 10.1155/2010/864165.
14. A. Srivastava, S. Yellampalli, P. K. Alli and S. S. Rajput, “Combined oscillation and IDDQ testing of a CMOS amplifier circuit,” Int. J. of Electronics, vol. 97, Issue 1, pp. 1-15, January 2010.
15. A. Srivastava, J. Marulanda, Y. Xu and A. K. Sharma, “Current transport modeling of carbon nanotube field effect transistors,” physica status solidi (a), vol. 206, no. 7, pp. 1569-1578, 2009.
16. S. S. Yellampalli and A. Srivastava, “ΔIDDQ testing of CMOS Data Converters,” J. Active & Passive Devices, vol. 4, pp. 63-89, 2009.
17. A. Srivastava and C. Zhang, “An adaptive body-bias generator for low voltage CMOS VLSI circuits,” Int. J. Distributed Sensor Networks, vol. 4, issue 2, pp. 213-222, May 2008 (Special Issue: Advances on Heterogeneous Wireless Sensor Networks).
18. J. M. Marulanda, A. Srivastava and A.K. Sharma, “Threshold and saturation voltages modeling of carbon nanotube field effect transistors (CNT-FETs),” NANO, vol. 3, no. 3, pp. 195-201, 2008.
19. J. M. Marulanda and A. Srivastava, “Carrier density and effective mass calculations in carbon nanotubes, physica status solidi (b), vol. 245, no. 11, pp. 2558-2562, 2008.
20. S. S. Yellampalli and A. Srivastava, “ΔIDDQ based testing of submicron CMOS based digitalto- analog converter circuits,” J. Active & Passive Devices, vol. 3, pp. 341-353, 2008. 14.
21. S. R. Herlekar, H.-C. Wu, M. Saquib and A. Srivastava, "Hot carrier effects in wireless communication systems built on short-channel MOSFETs," IEEE Trans. on Wireless Communications (Letters), vol. 6, no. 7, pp. 2402-2406, 2007.
22. Chi Zhang and A. Srivastava, “Hot carrier effects on jitter performance in CMOS voltagecontrolled oscillators,” Fluctuation and Noise Letters, vol. 6, no. 3, pp. L329-L334, 2006.
23. C. Zhang, A. Srivastava and P. K. Ajmera, “A 0.8 V CMOS amplifier design,” J. Analog Integrated Circuits and Signal Processing, vol. 47, pp. 315-321, 2006.
24. S. R. Herlekar, H.-C. Wu, Chi Zhang and A. Srivastava, “OFDM performance analysis in the phase noise arising from the hot-carrier effect,” IEEE Trans on Consumer Electronics, vol. 52, no. 3, pp. 757-765, Aug. 2006.
25. M. Feldman, A. El-Amawy, A. Srivastava and R. Vaidyanathan, “Adjustable Wallaston-like prisms,” Review of Scientific Instruments, vol. 77, pp. 066109-1 to 2, 2006.

Profile Details

https://www.ece.lsu.edu/fac/Srivastava.html

Last Updated: 2015-08-06