Circuits and Systems

Vol.7 No.9(2016), Paper ID 68864, 9 pages

DOI:10.4236/cs.2016.79213

 

Incorporation of Reduced Full Adder and Half Adder into Wallace Multiplier and Improved Carry-Save Adder for Digital FIR Filter

 

S. Chinnapparaj, D. Somasundareswari

 

Department of ECE, Hindusthan Institute of Technology, Coimbatore, India
Department of EEE, SriGuru Institute of Technology, Coimbatore, India

 

Copyright © 2016 S. Chinnapparaj, D. Somasundareswari et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

 

How to Cite this Article

Chinnapparaj, S. and Somasundareswari, D. (2016) Incorporation of Reduced Full Adder and Half Adder into Wallace Multiplier and Improved Carry-Save Adder for Digital FIR Filter. Circuits and Systems, 7, 2467-2475. doi: 10.4236/cs.2016.79213.
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