Department of EEE, KSR Institute for Engineering and Technology, Tamilnadu, India
Department of EEE, PAC Ramasamy Raja Polytechnic College, Tamilnadu, India
Department of EEE, KSR Institute for Engineering and Technology, Tamilnadu, India
Copyright © 2016 Jeyabharath Rajaiah, Velmurugan Ramar, Veena Parasunath et al. This is
an open access article distributed under the Creative Commons Attribution
License, which permits unrestricted use, distribution, and reproduction in any
medium, provided the original work is properly cited.
How to Cite this Article
Rajaiah, J. , Ramar, V. and Parasunath, V. (2016) Harmonic Minimization in Seven-Level Cascaded Multilevel Inverter Using Evolutionary Algorithm.
Circuits and Systems,
7, 2309-2322. doi:
10.4236/cs.2016.79201.