Department of Electrical and Electronics Engineering, Anna University, BIT Campus, Tiruchirappalli, India
Department of Electronics and Communication Engineering, Sudharsan Engineering College, Pudukottai, India
Department of Electrical and Electronics Engineering, Anna University, BIT Campus, Tiruchirappalli, India
Copyright © 2016 R. Gandhi Raj, S. Palani, H. Habeebullah Sait et al. This is
an open access article distributed under the Creative Commons Attribution
License, which permits unrestricted use, distribution, and reproduction in any
medium, provided the original work is properly cited.
How to Cite this Article
Raj, R. , Palani, S. and Sait, H. (2016) State Space Modeling and Implementation of a New Transformer Based Multilevel Inverter Topology with Reduced Switch Count.
Circuits and Systems,
7, 446-463. doi:
10.4236/cs.2016.74038.