Circuits and Systems

Vol.7 No.1(2016), Paper ID 62715, 10 pages

DOI:10.4236/cs.2016.71001

 

Design of Low-Voltage, Low-Power FGMOS Based Voltage Buffer, Analog Inverter and Winner-Take-All Analog Signal Processing Circuits

 

Aakansha Suchitta, Richa Srivastava, Akanksha Dewaker, Maneesha Gupta

 

Present Address: Indian Institute of Technology Delhi (IIT-D), New Delhi, India
Present Address: A.K.G. Engineering College, Ghaziabad, India
Present Address: TRAI, New Delhi, India
Netaji Subhas Institute of Technology, New Delhi, India

 

Copyright © 2016 Aakansha Suchitta, Richa Srivastava, Akanksha Dewaker, Maneesha Gupta et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

 

How to Cite this Article


Suchitta, A. , Srivastava, R. , Dewaker, A. and Gupta, M. (2016) Design of Low-Voltage, Low-Power FGMOS Based Voltage Buffer, Analog Inverter and Winner-Take-All Analog Signal Processing Circuits. Circuits and Systems, 7, 1-10. doi: 10.4236/cs.2016.71001.

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