Department of Electronics and Communication Engineering, PSG College of Technology, Coimbatore, India
Department of Electronics and Communication Engineering, Indus College of Engineering, Coimbatore, India
Department of Electronics and Communication Engineering, Indus College of Engineering, Coimbatore, India
Department of Electronics and Communication Engineering, Indus College of Engineering, Coimbatore, India
Department of Electronics and Communication Engineering, PSG College of Technology, Coimbatore, India
Copyright © 2013 U. Saravanakumar, R. Rangarajan, R. Haripriya, R. Nithya, K. Rajasekar et al. This is
an open access article distributed under the Creative Commons Attribution
License, which permits unrestricted use, distribution, and reproduction in any
medium, provided the original work is properly cited.
How to Cite this Article
U. Saravanakumar, R. Rangarajan, R. Haripriya, R. Nithya and K. Rajasekar, "Cluster Based Hierarchical Routing Algorithm for Network on Chip,"
Circuits and Systems, Vol. 4 No. 5, 2013, pp. 401-406. doi:
10.4236/cs.2013.45053.