Efficient Realization of Vinculum Vedic BCD Multipliers for High Speed Applications

ISSN Print: 2153-1285
ISSN Online: 2153-1293
www.scirp.org/journal/cs
E-mail: cs@scirp.org

Citations

"Efficient Realization of Vinculum Vedic BCD Multipliers for High Speed Applications"
written by G. Sreelakshmi, Kaleem Fatima, B. K. Madhavi,
published by Circuits and Systems, Vol.9 No.6, 2018

has been cited by the following article(s):

[1]	DESIGNING OF DIGITAL CIRCUITS USING VEDIC MATHEMATICS FOR ENGINEERING APPLICATIONS
	2021

[2]	Design and Implementation of Vinculum Binary Coded Decimal Multipliers using Vinculum Binary Coded Decimal Compressors
	2019

[1]	Emerging Trends in Microelectronics, Communication and Intelligent Systems Lecture Notes in Electrical Engineering, 2025 DOI:10.1007/978-981-96-6406-1_14

[2]	An Efficient 32-bit Vinculum Vedic MAC Unit for Decimal Processors 2025 International Conference on Sustainable Technologies for Humanity and Smart World (HSWTech), 2025 DOI:10.1109/HSWTech64936.2025.11277416

[3]	Design and Implementation of Vinculum Binary Coded Decimal Multipliers using Vinculum Binary Coded Decimal Compressors 2019 International Conference on Communication and Electronics Systems (ICCES), 2019 DOI:10.1109/ICCES45898.2019.9002202