has been cited by the following article(s):
[1]
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The Effect of Noise Robustness on Domino Using Silicon Nano Materials
Silicon,
2024
DOI:10.1007/s12633-024-02854-8
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[2]
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Impact of Silicon Stacked Transistors on Nano Scale Domino Logic
Silicon,
2022
DOI:10.1007/s12633-021-01629-9
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[3]
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A 1‐bit full adder using CNFET based dual chirality high speed domino logic
International Journal of Circuit Theory and Applications,
2020
DOI:10.1002/cta.2714
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[4]
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A 1‐bit full adder using CNFET based dual chirality high speed domino logic
International Journal of Circuit Theory and Applications,
2020
DOI:10.1002/cta.2714
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[5]
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Low leakage domino logic circuit for wide fan-in gates using CNTFET
IET Circuits, Devices & Systems,
2019
DOI:10.1049/iet-cds.2018.5135
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[6]
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A 4:1 Multiplexer using dual chirality CNTFET-based domino logic in nano-scale technology
International Journal of Electronics,
2019
DOI:10.1080/00207217.2019.1663942
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