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Title: |
A Novel High Speed Structure for Dual-field Montgomery Modular Multiplication |
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Source: |
2012 International Conference on Computational Intelligence and Software Engineering (CiSE 2012)(E-BOOK)
(pp 237-240)
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Author(s): |
Xiao Guo, Beijing Microelectronics Technology Institute,Beijing, China
Anping Jiang, Beijing Microelectronics Technology Institute,Beijing, China
Yu Zong, Beijing Microelectronics Technology Institute,Beijing, China |
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Abstract: |
Being a key algorithm of ECC, modular multiplication defines the system’s overall performance. One of the most efficient and widely used modular multiplication algorithms is Montgomery modular multiplication algorithm. This paper presents a new hardware architecture to realize modular multiply in GF(p) and GF( 2m) based on the improved dual-field Montgomery modular multiplication’s algorithm. A new kind of module division has been come up with. We combine two multipliers together and realize them in one big Wallace tree multiplier. What’s more, in this design, all the computations in dual field, GF(p) and GF( 2m), including multiplication, addition, and so on, can be realized in one structure. These ensure that the time-cost, maximize savings and guarantee the biggest possible hardware resources conservation. Only 49 cycles are needed in order to realize the 256 bit dual-field modular multiplier in total.
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